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Ingress and egress queue / buffer
james43026
Member Posts: 303 ■■□□□□□□□□
in CCNP
The context of all of this comes from QOS studying. Cisco has stated that queuing is an outbound / egress concept (which is why traffic shaping can only happen outbound on an interface), and only a few of there products even do ingress / input queuing. So why is it that an interface always shows an inbound and outbound queue on any Cisco router? And is there really a difference between a buffer and a queue? I've always looked at it like this, a buffer is just the memory allocated, and the queue is the algorithm used for determining how packets stored in a buffer will be sent.
EDIT: It appears a lot of literature talk about an input queue on an interface, and in fact there is one. Only it serves a slightly different function than the output queue / queues though, it appears that the input queue is literally a queue in processor memory that holds the packet / packets until the IP_Input process is scheduled to run next on the CPU, upon running the IP_Input process checks the RIB and determines what interface the packet needs to go to, wraps a new layer 2 header onto the packet, and places it onto the output queue of the correct outbound interface in processor memory still, the packet is then copied from processor memory to input/output memory into the TX queue of the outbound interface, any QOS that would take place happens between the output queue and the TX queue, your CBWFQ queues are in the output queue located in processor memory, but are only actually used if the TX queue / TX ring is full. Not sure why, but Cisco only allows ingress shaping on a select models / line cards for some reason. As it appears ingress shaping could happen on any model, I suppose it's a matter of CPU power needed.
It's important to note that the description of packet flow above is for process switching. Interrupt switching would be different.
Sources:
http://www.cisco.com/c/en/us/support/docs/ip/express-forwarding-cef/13706-20.html
http://wiki.nil.com/Queuing_Principles_in_Cisco_IOS#Where_to_queue
http://www.cisco.com/c/en/us/products/collateral/ios-nx-os-software/quality-of-service-qos/sol_ov_c22-708224.html
EDIT: It appears a lot of literature talk about an input queue on an interface, and in fact there is one. Only it serves a slightly different function than the output queue / queues though, it appears that the input queue is literally a queue in processor memory that holds the packet / packets until the IP_Input process is scheduled to run next on the CPU, upon running the IP_Input process checks the RIB and determines what interface the packet needs to go to, wraps a new layer 2 header onto the packet, and places it onto the output queue of the correct outbound interface in processor memory still, the packet is then copied from processor memory to input/output memory into the TX queue of the outbound interface, any QOS that would take place happens between the output queue and the TX queue, your CBWFQ queues are in the output queue located in processor memory, but are only actually used if the TX queue / TX ring is full. Not sure why, but Cisco only allows ingress shaping on a select models / line cards for some reason. As it appears ingress shaping could happen on any model, I suppose it's a matter of CPU power needed.
It's important to note that the description of packet flow above is for process switching. Interrupt switching would be different.
Sources:
http://www.cisco.com/c/en/us/support/docs/ip/express-forwarding-cef/13706-20.html
http://wiki.nil.com/Queuing_Principles_in_Cisco_IOS#Where_to_queue
http://www.cisco.com/c/en/us/products/collateral/ios-nx-os-software/quality-of-service-qos/sol_ov_c22-708224.html